1. Field of the Invention
The present invention relates to a timing recovery circuit and more specifically to a timing recovery circuit for determining whether a sample point in a generated bit sequence is early or late based on binary logic already available in forming the generated bit sequence by comparing energy magnitudes of adjacent bits.
2. Description of Related Art
Timing recovery circuits are commonly used in communication channels to determine whether a sample point in a generated bit sequence is early or late. However, these conventional timing circuits require additional information and circuitry beyond what is needed to generate the bit sequence in order to determine whether the sample point is early or late. For a digital implementation, the required circuitry can be significant resulting in excessive complexity and cost. For example, conventional off-symbol boundary or fractional-symbol integrate and dump circuits require extra circuitry to perform integration and extra magnitude information must be obtained in order to determine whether a sample point is early or late.
The timing recovery circuit and method of the present invention determine whether a sample point in a generated bit sequence is early or late based on binary logic which is already available from the generated bit sequence by comparing energy magnitudes of adjacent bits. Symbol decisions are made with respect to sample points and a bit sequence is generated, using waveforms of an input signal correlated against a reference waveform for a one xe2x80x9c1xe2x80x9d symbol and a reference waveform for a zero xe2x80x9c0xe2x80x9d symbol. When the incoming waveform perfectly matches either reference waveform, maximum symbol energy is output indicating that the timing of the sampling points is correct. By contrast, when the incoming waveform does not perfectly match either reference waveform, symbol energy less than maximum is output indicating that the timing of the sampling points is early or late.
Next, the outputted symbol energy magnitudes between adjacent bits are compared. Using the bit pattern of the generated bit sequence and the results of the comparison of the energy magnitudes of adjacent bits, it can be determined whether the timing of a sampling point is early or late. Thus, determination of whether the timing of a sample point in a generated bit sequence is early or late does not require extra integration, circuitry, or magnitude information beyond that required for executing symbol decisions on the sample points.